Hello Volt Tech Team, Can anyone let me know how to enable and implement Automatic password sequencing which follows a pseudo-random sequence based on a 14-bit Fibonacci LFSR? Thank You
Hello, C19 (parallel to Riseth resistor) marked as NC in the evaluation board schematics, was populated in our design. Removing this cap. solved the problem. Thank You
Hello,
C19 (parallel to Riseth resistor) marked as NC in the evaluation board schematics, was populated in our design. Removing this cap. solved the problem. Thank You
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Hi, For enabling the automatic password sequencing you can write 1 to bit PAR of WDTCPUyCON1 (or WDTSCON1 for safety watchdog) Register. For example, if you want to enable automatic password sequencing for CPU0 you can do it like this (IfxScuWdt_getCpuWatchdogPassword()); = 1; (IfxScuWdt_getCpuWatchRead more
Hi,
For enabling the automatic password sequencing you can write 1 to bit PAR of WDTCPUyCON1 (or WDTSCON1 for safety watchdog) Register. For example, if you want to enable automatic password sequencing for CPU0 you can do it like this
After enabling this point the password changes automatically after each password check and follows a pseudorandom sequence based upon a 14-bit Fibonacci LFSR with characteristic polynomial x14 x13 x12 x2 1 as you said. So each time you have to calculate the new password grounded on this sequence.
Best Regards,
Ashish
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